SanDisk Assigned Three Patents

Flash EEPROM system with simultaneous multiple data sector programming
and storage of physical block characteristics in other designated blocks
SanDisk Corp., Sunnyvale, CA, has been assigned a patent (8,797,798) developed by Kevin M. Conley, San Jose, CA, John S. Mangan, Santa Cruz, CA, and Jeffrey G. Craig, Fremont, CA, for a “flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. These characteristics for user data blocks being accessed may, during operation of the memory system by its controller, be stored in a random access memory for ease of access and updating. A typical form of the memory system is as a card that is removably connectable with a host system but may alternatively be implemented in a memory embedded in a host system. The memory cells may be operated with multiple states in order to store more than one bit of data per cell.“

The patent application was filed on Aug. 1, 2013 (13/957,234).

Storing data in parallel in flash storage device using on chip page shifting between planes
SanDisk Technologies, Plano, TX, has been assigned a patent (8,775,722) developed by two co-inventors for “storing data in parallel in a flash storage device using on chip page shifting between planes.”

The co-inventors are Steven Sprouse, San Jose, CA, and Sergey Anatolievich Gorobets, Edinburgh, Scotland.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Methods and systems are disclosed herein for storing data in a memory device. Data for multiple pages is written in parallel using plane interleaving. For example, in a four plane write, a first set of four pages are written in the following sequence: 0, 1, 2, 3. A second set of four pages, after plane interleaving, are written in the following sequent: 7, 4, 5, 6. After writing the data, the pages of written data are read, page swapped if necessary, and then written into another portion of memory (such as MLC).”

The patent application was filed on Dec. 30, 2011 (13/341,543).

Fabricating non-volatile storage
SanDisk Technologies, Plano, TX, has been assigned a patent (8,803,220) developed by seven co-inventors for “non-voltage storage and techniques for fabricating non-volatile storage.”

The co-inventors are Henry Chien, San Jose, CA, Henry Chin, Vinod Robert Purayath, Santa Clara, CA, Dana Lee, Saratoga, CA, Takashi Whitney Orimoto, Sunnyvale, CA, Atsushi Suyama, Naoya, Japan, and Ming Tian, Yokkaichi, Japan.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Non-voltage storage and techniques for fabricating non-volatile storage are disclosed. In some embodiments, at least a portion of the control gates of non-volatile storage elements are formed from p-type polysilicon. In one embodiment, a lower portion of the control gate is p-type polysilicon. The upper portion of the control gate could be p-type polysilicon, n-type polysilicon, metal, metal nitride, etc. P-type polysilicon in the control gate may not deplete even at high Vpgm. Therefore, a number of problems that could occur if the control gate depleted are mitigated. For example, a memory cell having a control gate that is at least partially p-type polysilicon might be programmed with a lower Vpgm than a memory cell formed from n-type polysilicon.”

The patent application was filed on Aug. 23, 2013 (13/974,696).