Apple Assigned Three Patents
Memory having isolation units for isolating storage arrays, storage in analog memory cells across word lines using non-integer number of bits per cell, boot data storage schemes
By Jean Jacques Maleval | August 19, 2014 at 3:02 pmMemory having isolation units for isolating storage arrays
from a shared I/O during retention mode operation
Apple, Inc., Cupertino, CA, has been assigned a patent (8,767,495) developed by four co-inventors for a “memory having isolation units for isolating storage arrays from a shared I/O during retention mode operation.”
The co-inventors are Edward M. McCombs, Daniel C. Chow, Kenneth W. Jones and Alexander E. Runas, Austin, TX.
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A memory includes an I/O unit that is shared between multiple storage arrays. The shared I/O unit provides output data from the arrays. The memory includes an isolation unit connected between each storage array and the shared I/O unit. In addition, each of the storage arrays and the shared I/O unit may be connected to a separate switched voltage domain through for example, power gating circuits. If one or more of the storage arrays is placed in retention or low-voltage mode, the isolation units that are coupled to the affected storage arrays may be configured to isolate the bitlines of those storage arrays from the shared I/O data paths.”
The patent application was filed on Sept. 18, 2013 (14/029,989).
Storage in analog memory cells across word lines
using non-integer number of bits per cell
Apple, Inc., Cupertino, CA, has been assigned a patent (8,767,459) developed by four co-inventors for “data storage in analog memory cells across word lines using a non-integer number of bits per cell.”
The co-inventors are Yoav Kasorla, Even Yehuda, Israel, Naftali Sommer, Rishon Le-Zion, Israel, Eyal Gurgi, Petah-Tikva, Israel, and Micha Anholt, Tel-Aviv, Israel.
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method for data storage includes accepting data for storage in an array of analog memory cells, which are arranged in rows associated with respective word lines. At least a first page of the data is stored in a first row of the array, and at least a second page of the data is stored in a second row of the array, having a different word line from the first row. After storing the first and second pages, a third page of the data is stored jointly in the first and second rows.”
The patent application was filed on July 28, 2011 (13/192,501).
Boot data storage schemes for electronic devices
Apple, Inc., Cupertino, CA, has been assigned a patent (8,799,555) developed by Daniel J. Post, Cupertino, CA, and Matthew Byom, Campbell, CA, for “boot data storage schemes for electronic devices.”
The abstract of the patent published by the U.S. Patent and Trademark Office states: “Systems and methods are provided for storing and retrieving boot data (e.g., a first stage bootloader) in and from a non-volatile memory (NVM), such as a NAND flash memory. To increase storage reliability, the boot data may be stored in a subset of the pages in a boot data storage area, such as in only lower pages. The subset may be selected based on the specific operating specifications and characteristics of the NVM. To prevent a boot ROM from having to maintain a NVM-specific map of which pages are used to store boot data, the map may be maintained in the NVM itself. For example, the map may be in the form of a linked list, where each page storing boot data can include a pointer that points to the next page that stores boot data.“
The patent application was filed on April 14, 2011 (13/086,590).