Western Digital Assigned Three Patents

Charging backup charge storage element
for storage device using spindle phase switching elements
Western Digital Technologies, Inc., Irvine, CA, has been assigned a patent (8,724,422) developed by John R. Agness, Laguna Hills, CA, William K. Laird, Corona, CA, and Henry S. Ung, Tustin, CA, for a “system and method for charging backup charge storage element for storage device using spindle phase switching elements.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data storage system is disclosed including a data storage device having a controller coupled to non-volatile semiconductor memory and a power device having a common power rail and first, second, and third spindle phase switching elements, the common power rail receiving an input voltage and providing power to the data storage device and the power device. The data storage system further includes an inductor coupled between outputs of the first and second spindle phase switching elements, and a charge storage element coupled between the second spindle phase switching element output and ground. The power device further includes control circuitry that controls the first and second spindle phase switching elements to generate boost output voltage for charging the charge storage element during a boost mode, the boost output voltage enabling the controller to perform a data operation in an event of an interruption of power to the data storage system.”

The patent application was filed on Feb. 29, 2012 (13/407,984).

Indication of activity status of storage device
Western Digital Technologies, Irvine, CA, has been assigned a patent (8,751,699) developed by Chun Sei Tsai, Tustin, CA, and Kavita S. Patil, Irvine, CA, for “systems and methods for indication of activity status of a storage device.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Systems and methods for indication of activity status of a storage device is described. In one embodiment, an exemplary method comprises receiving, from a digital device, a status request requesting availability of a storage device, determining if one or more background tasks are being performed by the storage device, determining if one or more background tasks are pending to be performed by the storage device, generating a level of urgency indicator based on the determination of the one or more background tasks that are being performed and the determination of the one or more background tasks that are pending to be performed by the storage device, and providing the level of urgency indicator to the digital device.”

The patent application was filed on Dec. 22, 2011 (13/335,698).

Storage system bus transfer optimization
Western Digital Technologies, Irvine, California, has been assigned a patent (8,751,728) developed by Mei-Man L. Syu, Fremont, CA, Robert L. Horn, Yorba Linda, CA, and Virgil V. Wilkins, Perris, CA, for “storage system bus transfer optimization.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Embodiments of the invention include systems and methods for reducing bus transfers for a storage device. In particular, these systems and methods reduce bus transfers by modifying an interface transfer protocol which designates the size of a multiple block read or write command is transmitted in a separate block transfer size command. Separate block transfer size commands can be omitted where the storage device maintains a record of a previously used block transfer size and reuses the size for subsequent multiple block read or write commands.“

The patent application was filed on April 29, 2011 (13/098,357).