Micron Assigned Patent

Micron Technology, Inc., Boise, ID, has been assigned a patent (8,558,209) developed by Gurtej S. Sandhu, Boise, Idaho, and Sumeet C. Pandey, Boise, Idaho, for “memory cells having-multi-portion storage region.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Some embodiments include a memory cell having a data storage region between a pair of conductive structures. The data storage region is configured to support a transitory structure which alters resistance through the memory cell. The data storage region includes two or more portions, with one of the portions supporting a higher resistance segment of the transitory structure than another of the portions. Some embodiments include a method of forming a memory cell. First oxide and second oxide regions are formed between a pair of conductive structures. The oxide regions are configured to support a transitory structure which alters resistance through the memory cell. The oxide regions are different from one another so that one of the oxide regions supports a higher resistance segment of the transitory structure than the other.”

The patent application was filed on May 4, 2012 (13/464,934).