LSI Assigned Five Patents
Write head, interrupt scheduling and priority processing, flash memory, RAID, booting
By Jean Jacques Maleval | November 20, 2013 at 2:24 pmMagnetic storage device with chirped write head degaussing waveform
LSI Corp., San Jose, CA, has been assigned a patent (8,537,487) developed by Jason S. Goldberg, St. Paul, MN, and Boris Livshitz, Eagan, MN, for a “magnetic storage device with chirped write head degaussing waveform.”
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A circuit for use with a memory storage device including a magnetic storage medium and a write head operative to subject the magnetic storage medium to a magnetic field in response to an application of current to the write head, includes a write circuit operative to generate a write current supplied to the write head. The write current is characterized by a current waveform that reverses polarity in accordance with data to be stored on the magnetic medium. The circuit for use with the memory storage device further includes a degauss circuit operative to generate a degaussing current supplied to the write head. The degaussing current is characterized by a current waveform that oscillates between opposite polarities with an amplitude and a frequency that change over time.”
The patent application was filed on July 19, 2011 (13/186,445).
Advanced interrupt scheduling and priority processing
in storage system environment
LSI Corp., San Jose, CA, has been assigned a patent (8,560,750) developed by Sourin Sarka, Bangalore, India, for “systems and methods for advanced interrupt scheduling and priority processing in a storage system environment.”
The abstract of the patent published by the U.S. Patent and Trademark Office states: “Methods and systems for advanced interrupt processing and scheduling are provided. The system comprises a memory operable to store interrupt priorities, an interface, and a processor operable to acquire incoming interrupts and to handle the incoming interrupts according to the interrupt priorities. The processor is also operable to receive interrupt processing criteria from the interface (sent, for example, from a device not directly coupled with the system), and to modify the interrupt priorities of the memory based upon the interrupt processing criteria without losing incoming processing requests for the system. Additionally, the processor is operable to process the incoming interrupts according to the modified interrupt priorities responsive to modifying the interrupt priorities.”
The patent application was filed on May 25, 2011 (13/115,260).
Flash memory organization
LSI Corp., Milpitas, CA, has been assigned a patent (8,555,141) developed by Michael Hicken, Rochester, MN, Timothy Swatosh, Rochester, MN, and Martin Dell, Bethlehem, PA, for “flash memory organization.”
The abstract of the patent published by the U.S. Patent and Trademark Office states: “A flash-memory system is organized into a plurality of blocks and a plurality of pages in each block, each page having 2.sup.N data locations and K spare locations. At least one page in the memory has 2.sup.M user data sectors and each sector has 2.sup.N-M+L locations therein. Because L is at least 1 but less than 2.sup.N-M, user data is stored in the spare memory locations. By storing user data in spare locations that were previously off-limits to user data, enterprise-sized sectors can be efficiently stored in flash memories with little wasted memory, thereby making flash-memory systems compatible with existing hard-drive storage systems in enterprise system applications.”
The patent application was filed on June 4, 2009 (12/477,996).
Zero rebuild extensions for RAID
LSI Corp., San Jose, CA, has been assigned a patent (8,543,761) developed by Jonathan S. Goldick, San Francisco, CA for “zero rebuild extensions for RAID.”
The abstract of the patent published by the U.S. Patent and Trademark Office states: “Disclosed is a method of reliably operating a RAID storage system. A first block of data is striped across a plurality of drives following a CRUSH algorithm. The first block of data is again striped across a second plurality of drives to a D’+P’ stripe and placed on free drive space following the CRUSH algorithm. The data is written in an asynchronous fashion and possibly at a time when system utilization is low.”
The patent application was filed on April 8, 2011 (13/083,301).
Booting bootable virtual storage appliance
on virtualized server platform using hidden boot partition
LSI Corp., Milpitas, CA, has been assigned a patent (8,578,146) developed by Luca Bert, Cumming, GA, for a method “for booting a bootable virtual storage appliance on a virtualized server platform using a hidden boot partition.”
The abstract of the patent published by the U.S. Patent and Trademark Office states: “One embodiment is a method for booting a bootable virtual storage appliance on a virtualized server platform. One such method comprises: providing a virtual storage appliance on a server platform, the virtual storage appliance configured to manage a disk array comprising a plurality of disks, and wherein at least one of the disks comprises a hidden boot partition having a boot console; powering up the server platform; loading boot code on the server platform; loading the boot console from the hidden boot partition; and the boot console loading boot components for a virtualization environment. ”
The patent application was filed on June 9, 2009 (13/003,058).