Avalanche Technology Assigned Two Patents

Host-managed logical mass storage device using MRAM
Avalanche Technology, Inc., Fremont, CA, has been assigned a patent (8,547,745) developed by Mehdi Asnaashari, Danville, CA, for a “host-managed logical mass storage device using magnetic random access memory (MRAM).”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A mass storage device includes a storage media with magnetic random access memory (MRAM) devices and a NAND flash interface and NAND flash memory devices that are coupled to the MRAM devices. The storage media has partitions (LUNs) made of a combination of MRAM and NAND flash memory and further includes a controller with a host interface and a NAND flash interface coupled to the MRAM and NAND flash memory devices through a flash interface. A host is coupled to the controller through the host interface and the storage media communicates attributes to the host, an attribute being associated with one of the partitions, where the host uses the partition based on their attributes to optimize its performance.”

The patent application was filed on Nov. 16, 2012 (13/679,739).

Controller management of memory array of storage device using MRAM
Avalanche Technology, Inc., Fremont, CA, has been assigned a patent (8,526,234) developed by Mehdi Asnaashari, Danville, CA, for a “controller management of memory array of storage device using magnetic random access memory (MRAM).”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “An embodiment of the invention includes a mass storage device with a storage media that includes magnetic random access memory (MRAM) devices with a NAND flash interface and NAND flash memory devices that are coupled to the MRAM devices. The storage media is partitioned into a hybrid reserved area made of a combination of MRAM array NAND array and hybrid user area made of a combination of MRAM array and NAND array and further includes a controller with a host interface and flash interface coupled to the MRAM and NAND flash memory devices through a flash interface.”

The patent application was filed on Dec. 7, 2012 (13/708,582).