How Can 50 Year-Old ECC Give Flash Memory a Boost?

Did you know:
50 year-old error correction code gives today’s flash memory a boost

By Kent Smith is senior director of marketing for LSI’s flash components division

He is overseeing all outbound marketing and performance analysis in the company. Prior to LSI, he was senior director of corporate marketing at SandForce, acquired by LSI in 2012. Kent’s more than 25 years of marketing and management experience in computer storage and high-technology includes senior management positions at companies including Adaptec, Acer, Polycom, Quantum and SiliconStor. Kent holds an MBA from the University of Phoenix.

For the uninitiated, low-density parity-check (LDPC) code is an ECC that is used to both detect and correct errors on data that is transmitted from one point to another. All ECC types include correction data, so when information is transmitted with errors, the receiver has enough information to fix the errors without having to ask the source for the data again. This enables transmitted data to maintain a constant speed as is required, for instance with digital television signals.

LDPC code was first presented to the world by Robert G. Gallager at MIT in 1960.

It was very advanced for its time and, as it turned out, required a fantastic amount of computation to use. The problem was that back in 1960, vacuum tube computers of that period performed about 100 times less work than the microprocessor-powered computers of today. In 1960, you would need a computer the size of a 2,000-square-foot house to process the LDPC correction information in real-time. This was hardly economical, so LDPC was mostly lost for nearly 40 years, as other, simpler codes took its place over that period.

What was old is new again?
In the mid-1990s, engineers working on satellite transmissions for digital television dusted off the LDPC codes and started using them for real-time operations. By then, computer processing had seen dramatic reductions in size and costs. Fast-forward to the past five years: we have seen a major increase in LDPC development and use because it appears to be the best solution for high-speed data transmissions, especially those subject to heavy levels of electrical noise that induce higher error rates. Also, the processing power of target devices like WiFi receivers and HDDs has grown even stronger and faster than some of the main CPUs of a few years ago. This enables LDPC to be deployed for little additional cost with the advantage of real-time data correction superior to correction offered by simpler codes.

How do LDPC solutions for SSDs differ?
Many LDPC providers claim that their offerings rival the capabilities of competitive solutions, though often they aren’t telling the whole story. All LDPC solutions start with what is called hard-decision LDPC – a digital correction algorithm that operates at line rate on all data passing through the correction engine. The algorithm uses the meta-data generated from the user and system data stored on the flash memory, and helps recreate the user data when the flash memory returns it with errors.

Hard-decision LDPC catches most errors from the flash memory, though sometimes it can be overwhelmed by an inordinate number of errors. That is where soft-decision LDPC, a more analog-based correction algorithm, comes into play.

Can a soft-decision be strong enough for my data?
Soft-decision LDPC is an error correction method that looks at other information beyond the actual ECC data. Soft-decision, in a sense, looks at the metadata of the metadata.

The simplest form of soft-decision LDPC may just re-read the data at a different reference voltage, as if asking a person “Can you say that again?” More complex soft-decision might be compared to listening to a man with a heavy French accent speaking English. You know he just said something in English, but you could not clearly grasp what he said. You ask some questions and, from his answers, soon realize what he originally said and are now back on track.

While this might seem more like guessing at the answer, soft-decision LDPC uses statistics to help ensure the answers are not false positive results. As a result, soft-decision LDPC uncovers a new set of engineering problems that need to be solved, opening new opportunities for flash controller manufacturers to create powerful intellectual property (IP). For that reason, you’re likely to learn very little about how a given company’s soft-decision LDPC works.

At the 2013 Flash Memory Summit in Santa Clara, CA, LSI demonstrated its SHIELD Advanced Error Correction Technology. This technology includes hard and soft-decision LDPC with digital signal processing (DSP) and a number of other features designed to optimize future NAND flash memory operation in compute environments. One feature, called Adaptive Code Rate, works with other features to enable the spare area in flash memory reserved for ECC data to occupy less space than the manufacturer allocation and then dynamically grow to accommodate inevitable increases in flash error rates. The soft-decision LDPC capability offers multiple strengths of correction, with each activating only as necessary to ensure the lowest possible real-time latency.

High-powered microprocessor-powered computers today have enough computing power to process advanced error correction technologies. It is important to understand that not all LDPC solutions are the same.

When evaluating LDPC solutions, it is important to understand how they manage data correction when it exceeds the ability of the hard-decision LDPC. Robert G. Gallager’s LDPC code, presented at MIT in 1960, was ahead of its time. Pioneers like him still influence the technology of today as we work on current LDPC solutions that run on today’s flash memory products.