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Seagate Assigned Eight Patents

Backup power in memory devices, exchange coupled magnetic elements, spin-transfer torque memory unit, 3D non volatile memory units, multi-bit STRAM memory cells, magnetic memory element, user selectable caching management, configurable power control with storage devices

Regulation or isolation of backup power in memory devices
Seagate Technology LLC, Scotts Valley, CA, has been assigned a patent (8,479,032) developed by Jon David Trantham, Chanhassen, MN, Darren Edward Johnston, Burnsville, MN, and Dean Clark Wilson, Lonsdale, MN, for "systems, methods and devices for regulation or isolation of backup power in memory devices."

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Power-backup capabilities are provided by implementing a variety of different methods, systems and devices. According to one such implementation, a data-storage device is implemented having a memory control circuit controlling nonvolatile and volatile memory. An operating power circuit carries primary-operating power from the host-system to the memories and control circuitry. A backup power circuit includes energy-storage circuitry with one or more energy storage devices. An isolation-regulation circuit provides voltage regulation of power from the host-system and also isolates the host-system provided power from the energy storage devices. A regulation power circuit carries the regulated power from the isolation-regulation circuit to the energy storage devices."

The patent application was filed on June 26, 2009 (12/492,935).

Exchange coupled magnetic elements
Seagate Technology LLC, Cupertino, CA, has been assigned a patent (8,481,181) developed by Xiaobin Wang, Chanhassen, MN, and Kaizhong Gao, Eden Prairie, MN, for an "exchange coupled magnetic elements."

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Approaches to reduce switching field distribution in energy assisted magnetic storage devices involve first and second exchange coupled magnetic elements. The first magnetic elements have anisotropy, H.sub.k1, volume, V.sub.1 and the second magnetic elements are magnetically exchange coupled to the first magnetic elements and have anisotropy H.sub.k2, and volume V.sub.2. The thermal stability of the exchange coupled magnetic elements is greater than about 60 k.sub.BT at a storage temperature of about 300 K. The magnetic switching field distribution, SFD, of the exchange coupled magnetic elements is less than about 200% at a predetermined magnetic switching field and a predetermined assisting switching energy."

The patent application was filed on March 31, 2011 (13/077,946).

Diode assisted switching spin-transfer torque memory unit

Seagate Technology LLC, Scotts Valley, CA, has been assigned a patent (8,482,971) developed by five co-inventors for a "diode assisted switching spin-transfer torque memory unit."

The co-inventors are Xuguang Wang, Yiran Chen, Eden Prairie, MN, Dimitar V. Dimitrov, Edina, MN, Hongyue Liu, Maple Grove, MN, and Xiaobin Wang, Chanhassen, MN

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A memory array includes a cross-point array of bit and source lines. A memory is disposed at cross-points of the cross-point array. The memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. A transistor is electrically between the magnetic tunnel junction data cell and the bit line or source line and a diode is in thermal or electrical contact with the magnetic tunnel junction data cell to assist in resistance state switching."

The patent application was filed on May 16, 2012 (13/472,867).

Three dimensionally stacked non volatile memory units
Seagate Technology LLC, Scotts Valley, CA, has been assigned a patent (8,482,957) developed by four co-inventors for a "three dimensionally stacked non volatile memory units."

The co-inventors are Xuguang Wang, Eden Prairie, MN, Yong Lu, Rosemount, MN, Hai Li, Eden Prairie, MN, and Hongyue Liu, Maple Grove, MN

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A memory unit including a first transistor spanning a first transistor region in a first layer of the memory unit; a second transistor spanning a second transistor region in a second layer of the memory unit; a first resistive sense memory (RSM) cell spanning a first memory region in a third layer of the memory unit; and a second RSM cell spanning a second memory region in the third layer of the memory unit, wherein the first transistor is electrically coupled to the first RSM cell, and the second transistor is electrically coupled to the second RSM cell, wherein the second layer is between the first and third layers, wherein the first and second transistor have an transistor overlap region, and wherein the first memory region and the second memory region do not extend beyond the first transistor region and the second transistor region."

The patent application was filed on Oct. 25, 2011 (13/280,395).

Multi-bit STRAM memory cells
Seagate Technology LLC, Scotts Valley, CA, has been assigned a patent (8,482,970) developed by Dimitar V. Dimitrov, Edina, MN, for "multi-bit STRAM memory cells."

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A multi-bit spin torque magnetic element that has a ferromagnetic pinned layer having a pinned magnetization orientation, a non-magnetic layer, and a ferromagnetic free layer having a magnetization orientation switchable among at least four directions, the at least four directions being defined by a physical shape of the free layer. The magnetic element has at least four distinct resistance states. Magnetic elements with at least eight magnetization directions are also provided."

The patent application was filed on Sept. 29, 2011 (13/248,592).

Magnetic memory element with multi-domain storage layer
Seagate Technology LLC, Scotts Valley, CA, has been assigned a patent (8,482,967) developed by five co-inventors for a "magnetic memory element with multi-domain storage layer."

The co-inventors are Haiwen Xi, San Jose, CA, Yuankai Zheng, Fremont, CA, Xiaobin Wang, Chanhassen, MN, Dimitar V. Dimitrov, Edina, MN, and Pat J. Ryan, St. Paul, MN

The abstract of the patent published by the U.S. Patent and Trademark Office states: "An apparatus and method for enhancing data writing and retention to a magnetic memory element, such as in a non-volatile storage array. In accordance with various embodiments, a programmable memory element has a reference layer and a storage layer. The reference layer is provided with a fixed magnetic orientation. The storage layer is programmed to have a first region with a magnetic orientation antiparallel to said fixed magnetic orientation, and a second region with a magnetic orientation parallel to said fixed magnetic orientation. A thermal assist layer may be incorporated into the memory element to enhance localized heating of the storage layer to aid in the transition of the first region from parallel to antiparallel magnetic orientation during a write operation."

The patent application was filed on Nov. 3, 2010 (12/938,424).

User selectable caching management

Seagate Technology LLC, Scotts Valley, CA, has been assigned a patent (8,499,120) developed by Martin R. Furuhjelm, Grass Valley, CA, for a "user selectable caching management."

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A storage device can include at least one non-volatile storage medium, at least one data cache, and a controller configured to perform cache writing operations between the at least one non-volatile storage medium and the at least one data cache based on user-selected caching modes. Also presented is a user interface that can be configured to selectively enable and disable one or more caching modes, which selection of a caching mode directs cache writing operations performed by a controller. In some examples, a caching mode can be selected in a manner that is independent of a host computer system."

The patent application was filed on July 24, 2009 (12/508,895).

Configurable power control with storage devices
Seagate Technology LLC, Cupertino, CA, has been assigned a patent (8,504,860) developed by Jon David Trantham, Chanhassen, MN, and Christopher Thomas Cole, Bloomington, MN, for "systems, methods and devices for configurable power control with storage devices."

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Power is routed from one or more power supplies. As consistent with one or more example embodiments, a storage device senses and/or is informed of the availability and voltage level of one or more power supplies. Based upon the availability and voltage level of power supplies, circuits in the memory device are powered using one or more of the sensed power supplies. In some applications, the power is drawn in a manner that emulates the behavior of one or more circuits that are respectively powered."

The patent application was filed on June 26, 2009 (12/493,025).

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