Bitmicro Assigned Patent

Bitmicro Networks, Inc., Fremont, CA, has been assigned a patent (8,447,908) developed by Ricardo H. Bruce, Union City, CA, Elsbeth Lauren T. Villapana, Las Pinas, Philippines, and Joel A. Baylon, Cavite, Philippines, for a "multilevel memory bus system for solid-state mass storage."

The abstract of the patent published by the U.S. Patent and Trademark Office states: "The present invention relates to a multilevel memory bus system for transferring information between at least one DMA controller and at least one solid-state semiconductor memory device, such as NAND flash memory devices or the like. This multilevel memory bus system includes at least one DMA controller coupled to an intermediate bus; a flash memory bus; and a flash buffer circuit between the intermediate bus and the flash memory bus. This multilevel memory bus system may be disposed to support: an n-bit wide bus width, such as nibble-wide or byte-wide bus widths; a selectable data sampling rate, such as a single or double sampling rate, on the intermediate bus; a configurable bus data rate, such as a single, double, quad, or octal data sampling rate; CRC protection; an exclusive busy mechanism; dedicated busy lines; or any combination of these."

The patent application was filed on Sept. 7, 2010 (12/876,247).