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Marvell Assigned Six Patents

Flash storage manager, storage and HDD controller, boot in non-volatile semiconductor, electrostatic discharge protection in magnetic system, adjusting gain and offset loops in storage system

Distributed flash memory storage manager systems
Marvell World Trade, St. Michael, Barbados, has been assigned a patent (8,422,264) developed by Wei Zhou, Chee Hoe Chu, San Jose, CA, and Po-Chien Chang, Saratoga, CA, for "distributed flash memory storage manager systems."

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A flash memory storage system may include several modules of flash memory storage manager circuitry, each having some associated flash memory. The modules may be interconnected via the flash memory storage manager circuitry of the modules. The system may be able to write data to and/or read data from the flash memory associated with various ones of the modules by routing the data through the flash memory storage circuitry of the modules. The system may also be able to relocate data for various reasons using such read and write operations. The flash memory storage circuitry of the modules keeps track of where data actually is in the flash memory."

The patent application was filed on Sept. 5, 2012 (13/603,994).

Power save module for storage controllers
Marvell International, Hamilton, Bermuda, has been assigned a patent (8,417,900) developed by four co-inventors for a "power save module for storage controllers."

The co-inventors are Angel G. Perozo, Mission Viejo, CA, Theodore C. White, Rancho Santa Margarita, CA, William W. Denninm and Aurelio J. Cruz, Aliso Viejo, CA.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A storage controller includes a memory controller that interfaces with memory that stores data. A first receive logic interface provides an interface to a host. A second receive logic interface provides an interface to a storage device. A power save module has a power save mode in which at least a clock of the memory controller is turned off while a clock for operating the first receive logic interface and the second receive logic interface is kept on."

The patent application was filed on June 9, 2008 (12/157,212).

HDD controller which coordinates
transmission of buffered data with host

Marvell International, Hamilton, Bermuda, has been assigned a patent (8,412,895) developed by Huy Tu Nguyen, Laguna Hills, CA, William C. Wong, Cerritos, CA, and Kha Nguyen, Anaheim, CA, for "HDD controller which coordinates transmission of buffered data with a host."

The abstract of the patent published by the U.S. Patent and Trademark Office states: "The transmission of buffered data is coordinated between a storage medium and a host in response to a request from the host. One or more blocks of data are transferred from the storage medium to a buffer memory. One or more frames of data are transmitted from the buffer memory to the host, wherein the number of blocks ending in the frame is recorded in a blocks/frame register, and possibly also in a block count accumulator register. Buffer release pulses for releasing buffer space in memory are sent to the buffer memory, based on the number of blocks in the blocks/frame register, or the number of blocks accumulated in the block count accumulator register when a signal is received from the host. A pointer which points to the last block of data successfully transferred is updated in accordance with the buffer release pulses."

The patent application was filed on Feb. 21, 2012 (13/401,179).

Turbo boot for subsequent booting
from captured data stored
in non-volatile semiconductor memory

Marvell International, Hamilton, Bermuda, has been assigned a patent (8,417,928) developed by Qun Zhao, Pleasanton, CA, and Xinhai Kang, San Jose, CA, for "turbo boot systems and methods for subsequent booting from a captured data stored in a non-volatile semiconductor memory."

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A computer system includes a HDD and a non-volatile semiconductor memory. The HDD stores a first set of data that includes boot up data. The non-volatile semiconductor memory is distinct from semiconductor memory of the HDD and semiconductor memory of a host of the computer system. A turbo boot driver module stores the boot up data in the non-volatile semiconductor memory and transfers the boot up data from the non-volatile semiconductor memory to a file system of the host during a boot up mode of the host."

The patent application was filed on Sept. 21, 2009 (12/563,239).

Providing electrostatic discharge protection
for read element in magnetic storage system

Marvell International, Hamilton, Bermuda, has been assigned a patent (8,424,190) developed by Pantas Sutardja, San Jose, CA, for a "method of providing electrostatic discharge protection for a read element in a magnetic storage system."

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method of providing electrostatic discharge (ESD) protection for a read element in a magnetic storage system comprises coupling a first terminal of a shunting device to a first terminal of the read element; coupling a second terminal of the shunting device to a second terminal of the read element; providing a conductive path between the first and second terminals of the shunting device when the read element is disabled; and providing a nonconductive path between the first and second terminals of the shunting device when the read element is enabled."

The patent application was filed on Oct. 23, 2007 (11/975,979).

Adjusting gain and offset loops in storage system
Marvell International, Hamilton, Bermuda, has been assigned a patent (8,441,910) developed by Jie Xie, Longmont, CO, and Mats Oberg, Cupertino, CA, for a "system and method of adjusting gain and offset loops in storage system."

The abstract of the patent published by the U.S. Patent and Trademark Office states: "In one embodiment the present invention includes a qualification circuit that controls a read channel in a storage device. The qualification circuit includes a first circuit and a second circuit. The first circuit receives a first signal and generates a second signal based on a signal quality of the first signal. The second circuit receives the second signal, an envelope-derived error signal resulting from performing envelope derived error detection, and a decision-aided error signal resulting from performing decision aided error detection. The second circuit modifies the envelope-derived error signal and the decision aided error signal according to the second signal. The second circuit generates a control signal that controls the read channel according to the envelope-derived error signal and the decision-aided error signal having been modified."

The patent application was filed on May 4, 2009 (12/435,292).

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