Micron Assigned Three Patents
Data recovery in SSD, forming semiconductor constructions and NAND unit cells, security in storage devices
By Jean Jacques Maleval | April 1, 2013 at 2:50 pmData recovery in a solid state storage system
Micron Technology, Inc., Boise, ID, has been assigned a patent (8,327,224) developed by Troy Larsen, North Ogden, UT, Martin Culley, Boise, ID, and Troy Manning, Meridian, ID, for a "data recovery in a solid state storage system."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods for data recovery and memory systems are provided. According to at least one such method, when defective data is read from a memory location, the data is recovered by an XOR operation on the remaining good data and associated RAID data to reconstruct the defective data. The defective data is excluded from the XOR operation."
The patent application was filed on April 16, 2009 (12/424,766).
Forming semiconductor constructions
and methods NAND unit cells
Micron Technology, Inc., Boise, ID, has been assigned a patent (8,394,683) developed by D.V. Nirmal Ramaswamy, Boise, ID, and Gurtej S. Sandhu, Boise, ID, for "methods of forming semiconductor constructions, and methods of forming NAND unit cells."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Some embodiments include methods of forming semiconductor constructions. Alternating layers of n-type doped material and p-type doped material may be formed. The alternating layers may be patterned into a plurality of vertical columns that are spaced from one another by openings. The openings may be lined with tunnel dielectric, charge-storage material and blocking dielectric. Alternating layers of insulative material and conductive control gate material may be formed within the lined openings. Some embodiments include methods of forming NAND unit cells. Columns of alternating n-type material and p-type material may be formed. The columns may be lined with a layer of tunnel dielectric, a layer of charge-storage material, and a layer of blocking dielectric. Alternating layers of insulative material and conductive control gate material may be formed between the lined columns. Some embodiments include semiconductor constructions, and some embodiments include NAND unit cells."
The patent application was filed on Jan. 15, 2008 (12/014,508).
Protection of security parameters in storage devices
Micron Technology, Inc. Boise, Idaho, has been assigned a patent (8,370,645) developed by Mehdi Asnaashari, Danville, CA, for a "protection of security parameters in storage devices."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Security parameters used to encrypt data stored on a storage device may be protected using embodiments of systems and methods described herein. During a resize operation, data stored on a memory unit in the storage device may be altered prior to communicating an updated partition size to a host computer. In some examples, data is altered prior to storing the updated partition sizes in the storage device. In this manner, a host system may not receive the updated partition sizes until after the data is altered. Altering data may avoid exposure encrypted data, information about one or more security parameters used to encrypt data on the memory unit or decrypt data retrieved from the memory unit, or combinations thereof."
The patent application was filed on March 3, 2009 (12/397,149).