SanDisk Assigned Two Patents

Metal control gate formation in non-volatile storage

SanDisk Technologies, Inc., Plano, TX, has been assigned a
patent (8,278,203) developed by Jarrett
Jun Liang, San Francisco, CA, Vinod Robert Purayath, Santa Clara, CA, and Takashi
Whitney Orimoto, Sunnyvale, CA, for a "metal control gate formation in non-volatile
storage."

The abstract of the patent published by the U.S. Patent
and Trademark Office states: "Methods for fabricating control gates in non-volatile
storage are disclosed. When forming stacks for floating gate memory cells and transistor
control gates, a sacrificial material may be formed at the top of the stacks. After
insulation is formed between the stacks, the sacrificial material may be removed
to reveal openings. In some embodiments, cutouts are then formed in regions in which
control gates of transistors are to be formed. Metal is then formed in the openings,
which may include the cutout regions. Therefore, floating gate memory cells having
at least partially metal control gates and transistors having at least partially
metal control gates may be formed in the same process. A barrier layer may be formed
prior to depositing the metal in order to prevent silicidation of polysilicon in
the control gates."

The patent application was filed on July 28, 2010 (12/845,329).

Adaptive mode switching of flash memory address mapping
based on host usage characteristics

SanDisk Technologies, Inc., Plano, TX, has been assigned a
patent (8,301,826) developed by Carlos
J. Gonzalez, Los Gatos, CA, Mark Sompel, San Francisco, CA and Kevin M. Conley,
San Jose, CA, for an "adaptive mode switching of flash memory address mapping
based on host usage characteristics."

The abstract of the patent published by the U.S. Patent
and Trademark Office states: "In a non-volatile memory storage system such
as a flash EEPROM system, a controller switches the manner in which data sectors
are mapped into blocks and metablocks of the memory in response to host programming
and controller data consolidation patterns, in order to improve performance and
reduce wear. Data are programmed into the memory with different degrees of parallelism."

The patent application was filed
on Oct. 30, 2009 (12/609,789).