Silicon Storage Assigned Patent

Silicon Storage Technology, Inc., Sunnyvale, CA, has been assigned a patent (8,148,768) developed by Nhan Do, Saratoga, CA., and Amitay Levi, Cupertino, CA, for a "non-volatile memory cell with self aligned floating and erase gates, and method of making same."

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A memory device, and method of making the same, in which a trench is formed into a substrate of semiconductor material. The source region is formed under the trench, and the channel region between the source and drain regions includes a first portion that extends substantially along a sidewall of the trench and a second portion that extends substantially along the surface of the substrate. The floating gate is disposed in the trench, and is insulated from the channel region first portion for controlling its conductivity. The control gate is disposed over and insulated from the channel region second portion, for controlling its conductivity. The erase gate is disposed at least partially over and insulated from the floating gate. The erase gate includes a notch, and the floating gate includes an edge that directly faces and is insulated from the notch."

The patent application was filed on Nov. 26, 2008 (12/324,816).