French Start-Up Crocus Entering Spin Transfer Torque-based MRAM

Crocus Technology, developer of Magnetic Random Access Memory (MRAM), announced the development of a new Spin Transfer Torque (STT)-based MRAM technology that will deliver on the promise of using STT memory in high-density memory applications.

This development is Crocus’ first step toward creating an STT solution that delivers memory density that is competitive with DRAM and NOR-Flash. The new prototype, with minimum feature size of 50nm, allows Crocus to target integration of its STT MRAM technology into leading-edge semiconductor processes.

"The STT MRAM space has been struggling for years with key technical limitations, but Crocus has made a big step forward to address these issues and bring a viable STT solution to the market," said Jean-Pierre Braun, CEO and founder of Crocus Technology. "With this new development, Crocus is leveraging its successful prior experience in an earlier generation of MRAM to create a highly manufacturable STT technology suitable for use with the latest deep-submicron processes."

The planned deployment of this STT innovation will allow Crocus to deliver MRAM solutions that compete in several of the largest segments of the memory chip market, including DRAM, NOR-Flash, and embedded SRAM. Typical applications for high-density STT-based memory are expected to include high-end mobile phones, netbook computers, rotating media and solid-state disk drives, enterprise-class storage systems, network equipment, high-reliability industrial and automotive uses, as well as other applications where MRAM can solve the system problems associated with ‘instant power-on’ and zero-risk recovery from power interruptions. Also anticipated are applications where the use of MRAM will lower the cost of embedded static RAM (SRAM), such as in microprocessor cache memory.

"Crocus’ advanced STT memory may finally allow designers and engineers to view MRAM as a serious alternative to DRAM, NOR Flash, or embedded SRAM," said Jim Turley, principal at Silicon Insider. "The company’s technology also makes a splendid replacement for embedded NOR-Flash that’s scalable to more advanced semiconductor processes. STT MRAM is about ten times denser than embedded SRAM, so it’s also a potential replacement for microprocessor cache memory."

Crocus’ development addresses two critical problems in the implementation of STT MRAM that have previously hampered competitiveness with other popular memory types: memory bit density and stability. Crocus has developed a magnetic cell with an industry leading dynamic (i.e. sub-10 nanosecond) write current level of 2×10
⁶


amp/cm², e.g. less than 100µA write current per bit, a major milestone which will remove a significant obstacle to bit cell scaling and density. Crocus’ STT technology also provides for industry-leading data stability.

Crocus’ STT technology leverages the company’s expertise as used in its previous successful development of TAS (Thermally Assisted Switching), Crocus’ first generation of MRAM technology. Crocus’ TAS technology is currently being transferred to Tower Semiconductor for full-scale production implementation. Crocus’ TAS MRAM products, manufactured with 130nm and 90nm processes, target standalone SRAM replacement and embedded memory in microcontrollers, while STT is focused on higher density applications such as embedded cache and NOR-Flash replacement in System-on-Chip designs made with 65nm or smaller processes.