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Gennum’s Snowbush IP Group Delivers USB 3.0 Integrated PHY and Controller

For SoCs, consumer and storage devices

Delivering the high-speed serial interface and IP integration expertise needed to enable rapid deployment of SuperSpeed USB devices, Gennum Corporation (TSX: GND) today announced that its Snowbush IP group has developed the industry’s first available integrated USB 3.0 SuperSpeed PHY and controller solution. The new USB 3.0 cores can be licensed immediately by system-on-a-chip (SoC) and system companies, enabling solutions that satisfy the low-power, bandwidth-hungry demands of USB 3.0 applications. In addition, with a team of specialized interconnect experts focused on the development of high-speed interface IP, Gennum’s Snowbush IP group has a proven track record of ensuring right-the-first-time silicon for customers.

"Our Snowbush IP group has delivered silicon-proven cores based on the industry’s most pervasive high-speed interconnect standards, such as PCI Express Gen2 and SATA Gen2, enabling many high-profile semiconductor suppliers and OEMs to get to market first with products based on these standards," said Ewald Liess, General Manager of the Snowbush IP group for Gennum. "Our extensive experience at data rates of 5 Gb/s and above, combined with over 200 million products that have been shipped with our IP, allow us to deliver high-speed serial interface IP that is high yielding, and optimized for the performance, power, size and cost of our customers’ target applications. Moreover, our extensive background in developing, licensing and supporting IP integration lowers the risk and time-to-market associated with complex SoC design."

Published by the USB Implementers Forum, SuperSpeed USB, is the latest version of a standard interface specification that has become ubiquitous on laptops, thumb drives, disk drives and digital devices such as cameras and media players. Also called USB 3.0, the standard defines an interface that operates in full-duplex mode, enabling the host and device to download and receive data simultaneously. This two-way communication, combined with a more than tenfold increase in data-transfer rate to 5 Gigabits per second (Gb/s) in each direction, enables dramatic performance improvements over the previous USB 2.0 standard which supported just 480 Mb/s and half-duplex (one-way) communication. SuperSpeed USB devices are expected to be capable of downloading and uploading much larger files, such as high-definition movies or hundreds of audio files, to a computer in a fraction of the time it currently takes.

"SuperSpeed USB will be key in several applications, including PCs, external storage, digital camcorders and digital still cameras. SuperSpeed USB products should begin to hit the market in the next 12 to 18 months, with growth rates exceeding 100 percent annually between 2009 and 2012," said Brian O’Rourke, principal analyst, digital entertainment, at market research firm In-Stat. "The availability of IP that will speed the design of SuperSpeed USB products will have a tremendous impact on that growth, as well as provide a market advantage as manufacturers are able to quickly bring new and differentiated products to the industry."

Snowbush IP Core Enables SuperSpeed USB
The integrated Snowbush device PHY and controller solution satisfies the 5 Gb/s speed requirement of USB 3.0, and exceeds the critical specifications for jitter and jitter tolerance, providing substantial margin to designers for creating robust products with excellent interoperability. The solution also satisfies the low-power requirements of the standard, supporting all SuperSpeed power modes and offering extensive programmability of the driver and receiver to help minimize power consumption.

The new IP block employs a variety of techniques
to ensure superior performance, reduced jitter
and maximum noise immunity, including:

  • A proprietary dual-loop hybrid clock-and-data recovery (CDR) architecture which recovers the clock with less jitter
  • A coupled ring oscillator VCO design with jitter performance usually only found in complex LC tank oscillators
  • Internal voltage and current regulation for sensitive circuits
  • Fully differential circuitry and clock signaling
  • Extensive use of guard rings within the macro

The new cores join a full suite of high-speed IP solutions that currently include PHY and controller products supporting the PCI Express Gen1 and Gen2, Serial ATA (SATA), Fibre Channel and other high-speed standards requiring data rates from 5 Gb/s to 10 Gb/s data rates and beyond.

Availability
The Snowbush integrated PHY and controller IP is available immediately for licensing, and can be provided for manufacture in leading 90-, 65- and 45-nanometer processes.

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