Virtium Assigned Patent

Virtium Technology, Inc., Rancho Santa Margarita, CA, has been assigned a patent (9,305,655) developed by Phan, Lan Dinh, Trabuco Canyon, CA, for a “solving MLC NAND paired page program using reduced spatial redundancy.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Reduced spatial redundancy of lower bits data provides data protection for a flash memory having MLC NAND devices operated in page mode. An interrupted write operation of most significant bit pages can corrupt previously written data in lower bit pages. The lower bits redundant memory assists in restoring the data, using less than a full back up storage.“

The patent application was filed on September 27, 2013 (14/038,749).