Samsung Starts Mass Production of 3-Bit 3D MLC V-NAND Flash Memory

Samsung Electronics Co., Ltd.www.samsung.com has begun mass producing the first 3-bit MLC three-dimensional (3D) Vertical NAND (V-NAND) flash memory, for use in SSDs.

“With the addition of a whole new line of high density SSDs that is both performance- and value-driven, we believe the 3-bit V-NAND will accelerate the transition of storage devices from HDD drives to SSDs,” said Jaesoo Han, SVP, memory sales and marketing, Samsung Electronics. “The wider variety of SSDs will increase our product competitiveness as we further expand our rapidly growing SSD business.”

The 3-bit V-NAND is Samsung’s latest second generation V-NAND device, which utilizes 32 vertically stacked cell layers per NAND memory chip. Each chip provides 128Gb of memory storage.

In V-NAND chip structure, each cell is electrically connected to a non-conductive layer using charge trap flash (CTF) technology. Each cell array is vertically stacked on top of one another to form multibillion-cell chips.

The use of 3 bit-per-cell, 32-layer vertically stacked cell arrays raises the efficiency of memory production. Compared to Samsung’s 10nm-class 3-bit planar NAND flash, the new 3-bit V-NAND has more than doubled wafer productivity.

Samsung introduced its first generation V-NAND (24 layer cells) in August 2013, and its second generation V-NAND (32-layer) cell array structure in May 2014.

After having first produced SSDs based on 3-bit planar NAND flash in 2012, Samsung has proven that there is a mass market for high-density 3-bit NAND SSDs.

The 3-bit 3D V-NAND will expand market adoption of V-NAND memory, to SSDs suitable for general PC users, in addition to addressing the high-endurance storage needs of servers.