R&D: Endurance Evaluation for NAND Flash-Based SSD

2017 IEEE/ACIS 16th International Conference on Computer and Information Science (ICIS) has published an article written by Yang Xiaoshan, China, Zhu Ligu, and Zhang Qicong , Computer School, Communication University of China, Beijing.

Schematic diagram of test topology

Abstract:“ The solid state drive based on NAND flash memory has been widely used, but the limited number of Program/Erase operation cycles has lead to its limited lifetime and reliability, reduced the endurance of solid state drive. The lifetime of the NAND flash-based solid state drive depends on its endurance, and the write amplification is an important factor that affects the endurance. It is of great value to test and evaluate the write amplification in real and accurate. The accuracy and credibility of the evaluation model are seldom mentioned in the existing research, and some characteristics of the solid state drive are neglected, therefore, the simulation model based on solid state drive has a credibility problem. In this paper, the actual volume data of programming operation in NAND flash memory chip is obtained by detecting the change signal of the pin on the flash chip, flash memory chip write amplification is tested and quantified, solid state drive Program/Erase wastage evaluation model based on NAND flash memory is studied and established, namely the endurance evaluation model (EEM). The experimental results show that the EEM is feasible and can be used to evaluate the endurance of solid state drive.“