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Spin Transfer Technologies Developing 20nm Magnetic Tunnel Junction MRAM

At R&D fab in Fremont, CA

Spin Transfer Technologies, Inc. (STT) announced it has fabricated perpendicular MRAM magnetic tunnel junctions (MTJs) at 20nm – among the smallest MTJs reported – at its development fab at the company’s Silicon Valley HQs.

The MTJ is the primary component of an MRAM memory cell and is the core technology of an MRAM device.

The company has had working ST-MRAM memory chips internally for some time, and based on requests from certain major semiconductor and systems companies, the company is now preparing to deliver functional samples to select customers.

The firm has moved its MRAM technology from R&D to commercialization largely on the strength of development done at its magnetics R&D fab, located at the company’s HQs in Fremont, California. This R&D fab includes process and analysis equipment, enabling the company to compress engineering development cycles to ten days that otherwise would have taken several months.

Since the beginning of the year, we’ve been able to process more than 40 wafer lots, an achievement that likely would have taken more than three years without our on-site R&D fab,” said Barry Hoberman, CEO, STT. “In just four years, STT has taken the journey from incubation to commercialization. We are excited to enter the next phase of the company’s evolution.

Company’s patented OST-MRAM has the potential to replace major segments of the market for flash, SRAM and DRAM semiconductors in applications such as mobile products, automotive, IoT)and storage. Compared with conventional spin transfer MRAM approaches, the OST-MRAM devices are expected to offer advantages in speed, power efficiency, cost, reliability and scalability. In addition, the company’s integration of magnetics and CMOS demonstrates the capability of the technology to operate in memory arrays with existing process standards and move quickly into high-volume production.

Initial samples of firm’s fully functional MRAM memories are targeted for non-volatile memory applications. The company is currently preparing evaluation boards to enable customers to evaluate the parameters of the memory.

Company’s development has been fueled by a venture capital structure led by Allied Minds, and to date, the firm has received $108 million, in aggregate funding from its investors. This level of commitment has not only enabled STT to build its development fab, but also to assemble a team of experts in the fields of magnetics and CMOS memory technology.

The firm’s team also includes Mustafa Pinarbasi, CTO and SVP, magnetics technology, a pioneer and innovator in magnetic thin films who spent nearly two decades as a leading technologist at IBM and HGST); Amitay Levi, VP, memory integration, a 28-year veteran of technology development in non-volatile memory; and Les Crudele , SVP, IC product development, who has more than 40 years of experience in semiconductor development.

The company’s technology was originally developed from research conducted in the laboratory of Professor Andrew Kent at New York University. The firm was formed and incubated by Boston-based Allied Minds in 2007 and first attracted direct institutional investment in 2012.

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