Silicon Storage Technology (Microchip) Assigned Patent

Silicon Storage Technology, Inc., San Jose, CA, has been assigned a patent (8,614,924) developed by two co-inventors for systems and methods for “non-volatile memory.”

The co-inventors are Hieu Van Tran, San Jose, CA, and Sakhawat M. Khan, Fort Lauderdale, FL.

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A high speed voltage mode sensing is provided for a digital multibit non-volatile memory integrated system. An embodiment has a local source follower stage followed by a high speed common source stage. Another embodiment has a local source follower stage followed by a high speed source follower stage. Another embodiment has a common source stage followed by a source follower. An auto zeroing scheme is used. A capacitor sensing scheme is used. Multilevel parallel operation is described.”

The patent application was filed on April 19, 2013 (13/866,966).