Semiconductor Energy Laboratory Assigned Two Patents

Semiconductor storage device
Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken, Japan, has been assigned a patent (9,041,449) developed by Yoneda, Seiichi, and Kobayashi, Hidetomo, Kanagawa, Japan, for a “semiconductor storage device.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A semiconductor storage device which stops and resumes the supply of power supply voltage without the necessity of saving and returning a data signal between a volatile storage device and a nonvolatile storage device is provided. In the nonvolatile semiconductor storage device, the volatile storage device and the nonvolatile storage device are provided without separation. Specifically, in the semiconductor storage device, data is held in a data holding portion connected to a transistor including a semiconductor layer containing an oxide semiconductor and a capacitor. The potential of the data held in the data holding portion is controlled by a data potential holding circuit and a data potential control circuit. The data potential holding circuit can output data without leaking electric charge, and the data potential control circuit can control the potential of the data held in the data holding portion without leaking electric charge by capacitive coupling through the capacitor.“

The patent application was filed on April 25, 2012 (13/455,195).

Storage device
Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken, Japan, has been assigned a patent (9,043,561) developed by Fujita, Masashi, Tokyo, Japan, for a “storage device.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”To provide a storage device with low power consumption. The storage device includes a plurality of cache lines. Each of the cache lines includes a data field which stores cache data, a tag which stores address data corresponding the cache data, and a valid bit which stores valid data indicating whether the cache data stored in the data field is valid or invalid. Whether power is supplied to the tag and the data field in each of the cache lines is determined based on the valid data stored in the valid bit.“

The patent application was filed on April 30, 2013 (13/873,388).