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LSI Assigned Seven Patents

Server DAS shared through virtual SAS expanders, multi-protocol storage controller, Interface for heterogeneous PCIe storage devices, SSDs as storage controller cache memory, common hot spare for multiple RAID groups, acquisition and adaption in NAND flash, encryption key destruction for secure data erasure

Server direct attached storage shared through virtual SAS expanders
LSI Corporation, San Jose, CA, has been assigned a patent (8,943,258) developed by Varchavtchik, Luiz D., Wichita, KS, Unrein, Jason A., Wichita, KS, and Kaufmann, Reid A., Andover, KS, for a “server direct attached storage shared through virtual SAS expanders.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A data storage system includes a first server including: a first plurality of storage disks configured to store data, and a first host bus adapter including a first processor configured to provide a first virtual expander and a first logic component, and a second server including: a second plurality of storage disks configured to store data, and a second host bus adapter including a second processor configured to provide a second virtual expander and a second logic component, wherein the first host bus adapter of the first server is coupled to the second host bus adapter of the second server via a SAS connection, and wherein each of the first plurality of storage disks and the second plurality of storage disks are accessible by each of the first server and the second server.

The patent application was filed on November 4, 2011 (13/289,617).

Multi-protocol storage controller
LSI Corporation, San Jose, CA
, has been assigned a patent (8,943,234) developed by Voorhees, William W., Petty, William K., and Saghi, Eugene, Colorado Springs, CO, for a “multi-protocol storage controller.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Systems and methods presented herein provide for coupling a storage controller to a plurality of different storage device types. One embodiment of the storage controller includes an interface operable to communicatively couple to a storage device. The storage controller also includes a processor operable to select between hardware protocol detection of the storage device and firmware protocol detection of the storage device, and to detect a protocol of the storage device when the storage device communicatively couples to the interface according to the selected protocol detection. The storage controller then selects a protocol to process input/output requests from a host based on the detected protocol of the storage device.

The patent application was filed on August 12, 2013 (13/964,670).

Interface for heterogeneous PCIe storage devices
LSI Corporation, San Jose, CA
, has been assigned a patent (8,943,226) developed by Hoglund, Timothy E., Colorado Springs, CO, Piccirillo, Gary J., and Yu, James K., Houston, TX, for a interface for heterogeneous PCIe storage devices.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Disclosed is a storage device interface. The storage device interface includes a plurality of PCIe device request engines. These PCIe device request engines receive I/O commands formatted for a respective one of a plurality of PCIe storage device communication standards. The storage device interface also includes a plurality of PCIe device completion engines. These PCIe device completion engines receive notifications of command completions from a plurality of PCIe storage devices that communicate using the aforementioned plurality of PCIe storage device communication standards. These notifications are validated. If an error is detected, processing of notifications of command completions associated with that device are blocked until the error is resolved. The plurality of PCIe device request engines and the PCIe device completion engines operate concurrently to process received I/O commands and received command completions.

The patent application was filed on December 20, 2013 (14/136,289).

Using SSDs as storage controller cache memory
LSI Corporation, San Jose, CA
, has been assigned a patent (8,938,574) developed by Smith, Gerald E., Longmont, CO, and Hallyal, Basavaraj G., Fremont, CA, for a “methods and systems using solid-state drives as storage controller cache memory.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Methods and systems for using one or more solid-state drives, (SSDs) as a shared cache memory for a plurality of storage controllers coupled with the SSDs and coupled with a plurality of storage devices through a common switched fabric communication medium. All controllers share access to the SSDs through the switched fabric and thus can assume control for a failed controller by, in part, accessing cached data of the failed controller in the shared SSDs.

The patent application was filed on October 25, 2011 (13/281,301).

Common hot spare for multiple RAID groups
LSI Corporation, San Jose, CA
, has been assigned a patent (8,943,359) developed by Tiwari, Prafull, Verma, Sumit, and Munireddy, Madan Mohan, Bangalore, India, for a “common hot spare for multiple RAID groups.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A storage system assigns one or more large disks in a storage enclosure as a common dedicated hot spare that is used by multiple RAID groups. Storage space equivalent to the smallest physical disk in a RAID group is allocated on the common dedicated hot spare. A mapping of this allocated storage space to the RAID group is maintained in nonvolatile memory. When a disk fails in the RAID group, the allocated storage space on the common dedicated hot spare receives a rebuild of the failed disk. Once the rebuild is complete, the allocated storage space acts as part of the RAID group. When the failed disk is replaced, the data on the allocated storage space is copied to the replacement disk. Once the copy is complete, the allocated storage space is once again set to act as a dedicated hot spare to the RAID group.

The patent application was filed on October 5, 2012 (13/646,369).

Threshold acquisition and adaption in NAND flash memory
LSI Corporation, San Jose, CA
, has been assigned a patent (8,942,037) developed by Xia, Haitao, San Jose, CA, Zhang, Fan, Milpitas, CA, Jin, Ming, Fremont, CA, and Yang, Shaohua, San Jose, CA, for a “threshold acquisition and adaption in NAND flash memory.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “A method, apparatus, and controller for acquiring and tracking at least one threshold voltage of at least one cell of at least one flash chip. The method can include acquiring the at least one threshold voltage of a particular cell of the at least one flash cell. The method can further include performing at least one threshold voltage adjustment iteration.

The patent application was filed on October 31, 2012 (13/664,583).

Encryption key destruction for secure data erasure
LSI Corporation, San Jose, CA
, has been assigned a patent (8,938,624) developed by Obukhov, Dmitry, San Jose, CA, and Tan, Bin, Cupertino, CA, for a “encryption key destruction for secure data erasure.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: “Techniques for encryption key destruction for secure data erasure via an external interface or physical key removal are described. Electrical destruction of key material retained in a memory of a storage device renders the device securely erased, even when the device is otherwise inoperable. The memory, e.g. non-volatile, such as flash) stores key material for encrypting/decrypting storage data for the device. An eraser provides power and commands to the memory, even when all or any portion of the device is inoperable. The commands, e.g. erase or write) enable zeroizing or destroying the key material, rendering data encrypted with the destroyed key material inaccessible, and therefore securely erased. Alternatively, the memory is a removable component, e.g. an external security device or smartcard) coupled to the device during storage operation. Removing and physically destroying the memory renders the device securely erased. The device and/or the memory are sealed to enable tamper detection.

The patent application was filed on September 15, 2011 (13/234,134).

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