HGST/WD Assigned Twelve Patents

Using stripes for recovering data in flash storage system
HGST Technologies Santa Ana, Inc., Santa Ana, CA, has been assigned a patent (9,377,960) developed by Moshayedi, Mark, Newport Coast, CA, and Calvert, William, Ewhurst, Great Britain, for a “system and method of using stripes for recovering data in a flash storage system.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A data storage method, comprising, receiving host data to be written to a plurality of flash storage devices, allocating the host data to one or more data units of a plurality of data units, allocating pad data to one or more data units of the plurality of data units that have not been filled with host data and generating redundant data in a redundant data unit based on the plurality of data units. The method further comprises steps for writing the plurality of data units and the redundant data unit to a stripe across the plurality of flash storage devices, wherein each of the plurality of data units and the redundant data unit is written in the respective flash storage devices at a common physical address.“

The patent application was filed on June 25, 2012 (13/532,718).

Acoustically secure phase change memory devices
HGST Netherlands B.V., Amsterman, The Netherlands, has been assigned a patent (9,367,483) developed by Guyot, Cyril, Vucinic, Dejan, San Jose, CA, and Franca-Neto, Luiz, Sunnyvale, CA, for a “acoustically secure phase change memory devices.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Systems, methods, and firmware for operating data storage devices and storage processors are provided herein. In one example, a data storage device is provided. The data storage device includes phase change media on which to write data, and a processing system configured to identify a write process to at least obfuscate an acoustic signature associated with writing the data on the phase change media and write the data to the phase change media in accordance with the write process.“

The patent application was filed on December 4, 2013 (14/096,921).

Enhanced data verify in data storage arrays
HGST Netherlands B.V., Amsterman, The Netherlands, has been assigned a patent (9,367,254) developed by Bruner, Curtis Howard, Niwot, CO, Kohoutek, Jerry, Berthoud, CO, and Mast, Jeffrey Edward, Loveland, CO, for a “enhanced data verify in data storage arrays.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”To provide enhanced operation of data storage devices and systems, various systems, methods, and software are provided herein. In a first example, a data storage system is configured to provide at least a portion of a first data storage device as a verification cache for a storage region of a second data storage device, write data for storage in the verification cache of the first data storage device and write the data for storage in the storage region of the second data storage device. The data storage system is configured to perform a verification process on the data written to the storage region after a verification trigger condition has been met. The data storage system is configured to transfer portions of the data that fail to pass the verification process from the verification cache to supersede the one or more parts of the data in the storage region.“

The patent application was filed on June 27, 2014 (14/316,798).

Spacing measurement improvement in presence of track mis-registration
HGST Netherlands B.V., Amsterman, The Netherlands, has been assigned a patent (9,361,922) developed by Hanson, Weldon M., Rochester, MN, and Saito, Kazuhiro, San Jose, CA, for a “spacing measurement improvement in the presence of track mis-registration.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Techniques for determining a relative spacing between a read head and a surface of a magnetic data storage device may use at least two magnetic spacing measurement patterns. A first magnetic spacing measurement pattern may be offset from a center of a data track by a first offset value and a second magnetic spacing measurement pattern may be offset by a second, different, offset value. A processor may determine a first harmonic tone and a second harmonic tone from each of the first and second magnetic spacing measurement patterns. The processor also may determine respective ratios between amplitudes of the first and second harmonic tones for each of the first and second magnetic spacing measurement patterns. The processor may determine which ratio is greater, and may utilize the greater ratio when determining relative spacing between the read head and the surface of the magnetic data storage device.“

The patent application was filed on August 21, 2015 (14/832,415).

Transferring storage resources between snapshot storage pools
and volume storage pools in distributed network
HGST Netherlands B.V., Amsterman, The Netherlands, has been assigned a patent (9,361,034) developed by Helman, Haim, Herzliya, Israel, Palmon, Omri, Tel Aviv, Israel, Zohar, Ofir, Alfe-Menashe, Israel, and Segev, Lior, Tel Aviv, Israel, for a “transferring storage resources between snapshot storage pools and volume storage pools in a distributed network.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Methods for data storage, including configuring in a data storage system a volume storage pool as data storage resources available for allocation of volumes in the data storage system are disclosed. One method includes defining a threshold value for the volume storage pool. When the allocation of the volumes causes the threshold value to be crossed, the method includes performing an action for managing the volume storage pool.“

The patent application was filed on May 7, 2015 (14/706,295).

Operating resistive array
HGST, Inc., San Jose, CA, has been assigned a patent (9,349,448) developed by Shepard, Daniel R., North Hampton, NH, for a “operating a resistive array.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”The present invention is a means and method for constructing and operating a 3-D array and, more particularly, a 3-D memory array. This array can be manufactured as a monolithic integrated circuit at low cost by virtue of the limited number of steps per layer of memory elements. The low number of steps results by having the storage elements separated by a resistive component as opposed to an active component. The 3-D array is in essence, an array of 2-D resistive arrays, (row-planes) having a long dimension, (typically along the rows) and a short dimension, (typically in the direction of the stacked layers). Any one row-plane can be isolated from the rest and be accessed independently from all of the other row-planes in the 3-D array. This makes it possible to operate and analyze a single row-plane as a mostly stand-alone circuit. The present invention lends itself to single bit accesses as well as simultaneous multiple bit accesses.“

The patent application was filed on December 19, 2014 (14/576,909).

Peak power efficient data storage drives
HGST Netherlands B.V., Amsterman, The Netherlands, has been assigned a patent (9,348,529) developed by Khatib, Mohammed Ghiath, San Jose, CA, for a “peak power efficient data storage drives.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”To provide enhanced operation of data storage devices and systems, various systems, apparatuses, methods, and software are provided herein. In a first example, a hard disk drive is provided. The hard disk drive includes rotating storage media for storing data and read/write heads positioned over the storage media and configured to write the data to the storage media and read the data from the storage media. The hard disk drive includes a storage control system configured to identify acceleration characteristics associated with the read/write heads. The storage control system is configured to execute storage operations using the read/write heads when the acceleration characteristics indicate a power consumption for the hard disk drive outside a peak power consumption range, and cache the storage operations when the acceleration characteristics indicate the power consumption for the hard disk drive within the peak power consumption range.“

The patent application was filed on January 27, 2015 (14/606,581).

Performing direct memory access at predetermined address in flash storage
HGST Technologies Santa Ana, Inc., Santa Ana, CA, has been assigned a patent (9,342,445) developed by Moshayedi, Mark, Newport Coast, CA, and Sadr, Seyed Jalal, Irvine, CA, for a “system and method for performing a direct memory access at a predetermined address in a flash storage.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A flash storage device provides direct memory access based on a first communication protocol. A host selects the first communication protocol and provides a request to the flash storage device for a direct memory access. Additionally, the host provides data blocks to the flash storage device for the direct memory access. In the first communication protocol, the host need not provide an address to the flash storage device for the direct memory access. The flash storage device stores the data blocks at sequential addresses starting at a predetermined address in the flash storage device. Another host may then select a second communication protocol and transfer the data blocks in the flash storage by using the second communication protocol.“

The patent application was filed on July 23, 2009 (12/508,531).

Reducing adjacent track interference effects in data storage system
HGST Netherlands B.V., Amsterman, The Netherlands, has been assigned a patent (9,336,818) developed by Dunn, Tony, San Jose, CA, and Feng, Yongchang, Fremont, CA, for a “method for reducing adjacent track interference effects in a data storage system.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A system and method is disclosed for improved operation of a data storage device such as a hard disk drive. The overhead for data rewriting may be reduced by the periodic remapping of logical block addresses to avoid excessive adjacent track interference effects on data blocks having lower data writing rates. It may employ the indirection system to remap data ‘hot spots’ to new locations neighboring on spare data blocks. In circumstances where it is not possible to write data next to spare data blocks, the active LBA may be periodically moved after a predefined number of write operations.“

The patent application was filed on February 4, 2015 (14/614,273).

Providing wear leveling in solid state devices
HGST Netherlands B.V., Amsterman, The Netherlands, has been assigned a patent (9,336,136) developed by Rastogi, Kanishk, Maharashtra, India, Unnikrishnan, Sanoj Kizhakkekara, Bangalore, India, and Mitra, Anand, Maharashtra, India, for a “apparatus, systems, and methods for providing wear leveling in solid state devices.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Embodiments of the present disclosure provides a memory-efficient mechanism for identifying memory blocks with a low wear count. More particularly, embodiments of the present disclosure provides a mechanism for identifying a memory block whose wear count is within the bottom p % of all wear counts associated with memory blocks in a storage system. If a memory controller always performs the garbage collection operation on a memory block whose wear count is within the bottom p % of all wear counts, then the memory controller is expected to utilize the remaining memory blocks, e.g., memory blocks whose wear count is within the upper, (100-p) % of all wear counts) efficiently and level the wear count of at least the remaining memory blocks.“

The patent application was filed on October 8, 2014 (14/509,400).

Improving performance and storage density in data storage device
HGST Netherlands B.V., Amsterman, The Netherlands, has been assigned a patent (9,324,368) developed by Dhanda, Abhishek, Hirano, Toshiki, and Semba, Tetsuo, San Jose, CA, for a “method and structure for improving performance and storage density in a data storage device.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”A data storage device with improved data storage densities, coupled with lower hard error and write-inhibit events is described. A feed-forward write inhibit, (FFWI) method enables data tracks to be written more densely. Alternatively, the FFWI method may reduce the hard error and write inhibit events to improve data storage performance. A concept of virtual tracks enables the FFWI method to be applied to the writing of circular data tracks with non-circular servo tracks, or to the writing of non-circular data tracks with PES data from circular servo tracks–in both cases, improvements to performance and/or storage densities are enabled. The FFWI method may also be applied to the case of both non-circular servo and data tracks.“

The patent application was filed on January 5, 2015 (14/589,573).

Enhanced data recovery from data storage devices
HGST Netherlands B.V., Amsterman, The Netherlands, has been assigned a patent (9,323,630) developed by Guyot, Cyril, and Bandic, Zvonimir, San Jose, CA, for a “enhanced data recovery from data storage devices.”

The abstract of the patent published by the U.S. Patent and Trademark Office states: ”Systems, methods, and firmware for recovery of data from storage devices are provided herein. In one example, a data storage device is provided. The data storage device includes a storage portion and a cache portion which caches data intended for storage in the storage portion. Responsive to a recovery read command identifying requested data, the data storage device retrieves stored data corresponding to the requested data from the storage portion without retrieving cached data corresponding to the requested data from the cache portion that supersedes at least a portion of the stored data. Responsive to a cache block list command, the data storage device transfers a list identifying one or more cached blocks of the cached data. Responsive to a read command that identifies at least one cached block, the data storage device retrieves the at least one cached block.“

The patent application was filed on September 16, 2013 (14/028,002).