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Synopsys DesignWare Verification IP Supports SATA 6Gb Specs
This is a Press Release edited by StorageNewsletter.com on Mon, June 23rd, 2008
Enabling faster testbench development for storage SoC designs
The third generation of the SATA specification doubles the data transfer rate of the 2.6 specification from 3Gbps to 6Gbps, enabling designers to take advantage of the increased throughput rates to move large amounts of data, such as high resolution photos, videos and music. Designers who want to implement a SATA 6Gbps interface can now use DesignWare Verification IP to significantly speed testbench development time and quickly verify their mass storage system-on-chip (SoC) designs.
The DesignWare Verification IP supports all major simulators and verification languages including Verilog, SystemVerilog, VHDL and Vera, allowing designers to quickly and efficiently create a comprehensive SATA- based environment. In addition, the Verification IP for SATA delivers up to 5X performance improvement when used with Synopsys' VCS simulation tool. Synopsys' comprehensive solution also includes the silicon-proven DesignWare digital controllers and PHY IP for SATA, providing designers with access to a complete SATA solution from a single IP vendor.
"Verification IP plays a critical role in lowering the testbench development time and cost by reducing the need to create a verification environment from the ground up," said John Koeter, senior director of marketing for IP and Systems at Synopsys. "The DesignWare Verification IP with support for 6Gbps enables designers to quickly take advantage of the latest specifications, while lowering integration risk and speeding their product development time."
Availability
The DesignWare Verification IP for SATA with support for 6Gbps is available as a standalone product, both in the DesignWare Library and VCS Verification Library.
For more information on DesignWare Verification IP for SATA
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