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Flash Memory Summit: NVMe IP Ready for Persistent Memories by IP-Maker

Processing NVMe protocol in sub-microsecond latency
This is a Press Release edited by StorageNewsletter.com on 2017.07.13

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IP-Maker SAS will exhibit at Flash Memory Summit in Santa Clara, CA, on August 8 to 10.

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The next generation of non-volatile memories comes with an access time in the microsecond range. The NVMe protocol has been introduced in order to minimize the protocol overhead. The company has implemented a NVMe management as a full hardware IP, able to process it in less than 1μs. That makes a solution for the use of persistent memories on the PCIe bus.

"We are proud to showcase our fast NVMe solution at Flash Memory Summit 2017.We demonstrate the benefits of a ultra-low latency NVMe-based storage drive in a database application." said Mickael Guyard, MD, IP-Maker." The performances are increased thanks to the sub-microsecond NVMe management latency, executed by the full hardware IP-Maker NVMe IP in the Xilinx Virtex7 FPGA."

The company's NVMe IP can be integrated in an ASIC or FPGA. The use of persistent memories allows the design of a new generation of SSDs by integrating a direct data path from the PCIe interface, through the NVMe IP controller, and a NVM interface controller on the backend.That simplifies the architecture and reduces the latency. The NVM can be based on emerging memories such as ReRAM or MRAM, or by using NVDIMM-like technologies which is based on a combination of DRAM, NAND flash and super-capacitors.

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